A problematic Oric 1
Re: A problematic Oric 1
It seems an hard case... But not yet a desperate one.
Re: A problematic Oric 1
When Noel (from Noel's RetroLab channel) has similar cases, he usually uses the oscilloscope to check for activity in the main pins: clocks, address and data bus, ras/cas,... checking the bus signals both at the processor and the ram chips usually reveals where the problematic memory or track is...
Re: A problematic Oric 1
HI there, so I tested the Oric with i ss ROM. As soon as I power the mainboard I've got no "busy" signal. After a reset button push the tone is present. No RAM inserted. So at this point I guess I have a problem during the ROM bootstrap and definitively with RAM communication. I can't explain myself why I have no tone as soon as I power the mainboard. Any hint?
Guys I really appreciates your efforts, sorry if I'm a questions raiser...
Uhm... I'm not that good. I guess I have to trigger the oscilloscope during the boot, but which pin should I observe? Do you have any other information or site to point me?Chema wrote: ↑Thu May 20, 2021 8:11 pm When Noel (from Noel's RetroLab channel) has similar cases, he usually uses the oscilloscope to check for activity in the main pins: clocks, address and data bus, ras/cas,... checking the bus signals both at the processor and the ram chips usually reveals where the problematic memory or track is...
Guys I really appreciates your efforts, sorry if I'm a questions raiser...
Re: A problematic Oric 1
Sorry Chema just realized you are talking about RAS/CAS and address/data buses. Using a RAM IC datasheet should give me the right wave to observe. Definitively a job for the weekend. I hope it will rain...
Re: A problematic Oric 1
Don't worry too much about not booting after power-on - this more or less normal Oric specific behavior .rh74 wrote: ↑Fri May 21, 2021 1:33 pm HI there, so I tested the Oric with i ss ROM. As soon as I power the mainboard I've got no "busy" signal. After a reset button push the tone is present. No RAM inserted. So at this point I guess I have a problem during the ROM bootstrap and definitively with RAM communication. I can't explain myself why I have no tone as soon as I power the mainboard. Any hint?
When testing always try to short C21 pins to make reset and see if Oric will boot.
For instance there can be difference in number of successful booting when you first plug the power adapter in the wall socket and then connect the barrel jack to the PCB, compared to first connect the jack and then plug the adapter to mains.
and FYI, the button is not REST - it's NMI that's why you should short C21 to make reset, of course you can attach an extra button to the reset line on the expansion port or in parallel to C21 for more easy testing...
Re: A problematic Oric 1
I know there are some example when he finds broken memory chips this way, but I could only find a couple of examples where problems were elsewhere. In any case the method is clear in the video (I don't feel capable of doing this, but love watching):
Checks a C64 CPU, finds problems due to PLA:
Checks CPC6128, problem was in the tracks connecting memory chips together: (EDIT: Changed the starting time...)
Checks a C64 CPU, finds problems due to PLA:
Checks CPC6128, problem was in the tracks connecting memory chips together: (EDIT: Changed the starting time...)
Last edited by Chema on Mon May 24, 2021 4:36 pm, edited 2 times in total.
Re: A problematic Oric 1
Guys it's me again... Is there a minimum and safe number of RAM ICs to start testing? I mean, I know at least a couple of ICs must be inserted to allow ROM find space to load, but the IC numeration is puzzling me (e.g. IC13 is not numbered and it falls between IC18 and IC20). Is the IC20 the first bank to be reached? Which is next, 13?
Re: A problematic Oric 1
Unfortunately, RAM is not banked - every single chip gives one bit,rh74 wrote: ↑Fri May 21, 2021 4:39 pm Guys it's me again... Is there a minimum and safe number of RAM ICs to start testing? I mean, I know at least a couple of ICs must be inserted to allow ROM find space to load, but the IC numeration is puzzling me (e.g. IC13 is not numbered and it falls between IC18 and IC20). Is the IC20 the first bank to be reached? Which is next, 13?
where IC12 is bit0 ... and IC19 bit7. So, it's impossible to use less chips.
IMO, chips labeled '-2' are 200ns and this can be the root problem. Oric standard RAM is 150ns (i.e. '-15').
Re: A problematic Oric 1
HM4864P-2 and HM4864-2 are 150ns access time 270ns cycle time according to the data sheet so they should be okay. HM4864-3 are the 200ns part.
Oric Extended Basic V1.1
(C) 1983 Tangerine
37631 Bytes Free
(C) 1983 Tangerine
37631 Bytes Free
Re: A problematic Oric 1
Yes, you are right @Vyper68! It's always good to RTFM!!!
@rh74: Can you share a list with chips which are confirmed 100% OK in your working Atmos?
Re: A problematic Oric 1
HI there, my friends. Unfortunately I had no spare time during the weekend, so no news for the moment. I checked the other two Oric (the early 1 and the Atmos) which still have original RAM soldered and I can confirm they are both HM4864P-2 equipped as Vyper68 wrote. So RAM access time should not be the origin of the issue.
@iss
So far:
@iss
So far:
- 6502
- 6522
- 10017
- AY-3-8912 (afaik)
- 74LS04 IC 21
- 74LS257 IC 20 and 8
- 74LS74 IC 24
- RAM ICs
Re: A problematic Oric 1
OK! Most probably it's broken track - a long and boring work but need to be done.
With oscilloscope it will be more quickly and easy .
Keep going!
With oscilloscope it will be more quickly and easy .
Keep going!
Re: A problematic Oric 1
So here I am... No damaged tracks between RAM chips. Awww. Let's start with the oscilloscope. I hope I'll find something. Keep going.
Re: A problematic Oric 1
Uhm... I just realized I didn't tested Address bus from the ULA and CPU... ok another test to add to the list...
Re: A problematic Oric 1
Well, I'm sure you'll find the cause. Good luck!
You may want to check the main signals in the CPU. A stuck IRQ or RESET, bad clock in or clock out... Just in case...
You may want to check the main signals in the CPU. A stuck IRQ or RESET, bad clock in or clock out... Just in case...