forum.defence-force.org

Posted: **Tue Feb 05, 2019 6:34 pm**

The page-3 thing is because the ULA does the donkey work of decoding "this is in 0x3FF" (to the I/O line, an output). That is used by the VIA (internally) with no further decoding, to save on hardware. It means the VIA can't help but repeat up page 3.

An external device that wants some of page 3 can use the IO line to say "It's page 3" and then decode as much of the lower 8 bits as it needs to jump in, shove the VIA aside (by asserting "I/O Control", and take over. You want to add extra facilities, *you* budget for the extra hardware

It would have been extra cost to pointlessly decode out 16 byte chunks into a range of I/O signals ...

With Phi 2: It's an ORIC-thing, not a 6502-thing, as far as I can tell.

The address bus is asserted by 6502 for the pretty much the whole of the 1MHZ clock cycle. Your external decoder will see a valid address and dump data onto the data bus for the whole cycle if you ignore Phi2 when building an input port.

This is a problem, because Phi2 is only valid for CPU-accessing-memory/peripherals on part of the cycle. The rest of the cycle, the ULA accesses DRAM directly to fetch video data. Nothing should be on the data bus at this point, other than ULA reading, DRAM outputting. The DRAM receives its address from the ULA directly, in two parts, on its own mini-address bus (8 bit), and that is NOT the address on the system address bus that your hardware can still see. So you end up talking over the DRAM and the ULA gets corrupt data. The databus is shared for everything.

For timing diagrams (Oric runs slightly odd compared to normal 6502 timings) in gruesome detail:- http://oric.signal11.org.uk/files/pub/u ... Schems.pdf

Posted: **Tue Feb 05, 2019 8:22 pm**

Oh, I see...

I always thought that R/W was only set in the period Phi2 was high, while the ULA accessed the RAM when it was low (or was it the other way around?), but it seems that indeed the state of Phi2 must be taken into account too.

Okay, I always loved hardware but always also sucked at it and keep misunderstanding how things work; not sure why I love asking

Thanks!

Posted: **Wed Feb 06, 2019 6:54 pm**

The "R/W line" on the expansion port comes from the processor, and it has no knowledge of the ULA's trickery.

The R/W line going to the DRAM (internal use only!) copies this during ph2 high, and is forced to the "read" state during ph2 low, as the ULA is definitely reading, twice.

The problem is that if the R/W line is (as you say) only asserted during Ph2 high, what state should it be on Ph2 low? Read? Then external peripherals might dump data onto the bus and clobber the ULA reading DRAM. Write? Then external peripherals may consume whatever is passing between the DRAM and ULA instead of (or as well as) their own data. It needs a third state, which the 6502 doesn't do.

Posted: **Sat Mar 02, 2019 8:50 am**

So, I finally received my connectors, and I redid the cable for the Speech Synthesizer, all in black instead of gray, and with the intermediate connector for the microdisc (which as a moron I attached with the notch in the wrong direction... grrr).

Here is what it looks like

And indeed that works, I was able to make the small demo program loaded from the Cumulus:

Posted: **Sat Mar 02, 2019 9:26 am**

Everything looks very beautiful, congrats! And the best is that works with Cumulus.
What is the text being spoken? It's bit hard to understand for me "This is .... cyber...."

Posted: **Sat Mar 02, 2019 9:34 am**

iss wrote: ↑
Sat Mar 02, 2019 9:26 am
Everything looks very beautiful, congrats! And the best is that works with Cumulus.
What is the text being spoken? It's bit hard to understand for me "This is .... cyber...."

The actual code is that:

Code: Select all

//
// This program simply tests the SPO 256 synthe
//
#include <lib.h>

void waitLoop()
{
	int n=50;
	while (n--)
	{

	}
}

void wait(int delay)
{
	int a=23;
	while (delay--)
	{
		a=a*3;
		waitLoop();
	}
}

unsigned char phonemes[]=
{
	// This is the SPO256 based speech synthesizer sold by Oric in the Periph'IOric range of peripherals.
	0x36, 0x0C, 0x0C, 0x37, 0x37, 0x03, 0x02, 0x0C, 0x2B, 0x03, 0x02, 0x12, 0x13, 0x03, 0x02, 0x07, 0x2B, 0x09, 0x13, 0x18, 0x0D, 0x1F, 0x1B, 0x0F, 0x0B, 0x21, 0x33, 0x07, 0x21, 0x28, 0x0C, 0x28, 0x0D, 0x13, 0x37, 0x0C, 0x2A, 0x37, 0x3F, 0x14, 0x36, 0x37, 0x15, 0x03, 0x02, 0x37, 0x09, 0x13, 0x32, 0x03, 0x02, 0x37, 0x0C, 0x0B, 0x1D, 0x07, 0x2B, 0x18, 0x06, 0x2B, 0x34, 0x03, 0x02, 0x37, 0x35, 0x2D, 0x15, 0x03, 0x02, 0x3F, 0x17, 0x06, 0x03, 0x02, 0x17, 0x17, 0x33, 0x0C, 0x29, 0x03, 0x02, 0x0C, 0x0C, 0x0B, 0x03, 0x02, 0x12, 0x13, 0x03, 0x02, 0x09, 0x07, 0x33, 0x0C, 0x28, 0x00, 0x0C, 0x17, 0x17, 0x33, 0x0C, 0x29, 0x03, 0x02, 0x33, 0x14, 0x36, 0x0B, 0x0A, 0x03, 0x02, 0x0F, 0x0F, 0x23, 0x1B, 0x03, 0x02, 0x09, 0x07, 0x33, 0x0C, 0x28, 0x34, 0x0F, 0x2D, 0x2B, 0x03, 0x02, 0x04, 0x04, 0x03

	// Bonjour	
	//0,63,23,38,31,39,4,4,4,4
};


void main()
{
	cls();

	printf("\r\nSpeechSynthesizer Demo");

	poke(1009,128);
	wait(20);

	{
		int n;

		while (1)
		{
			printf("\r\nBonjour!");
			for (n=0;n<sizeof(phonemes);n++)
			{
				poke(1009,phonemes[n]);
				wait(20);
				while (peek(1009)<=127)
				{
					wait(20);
				};

			}
		}
	}
	get();	
}

I added the "wait loops" because apparently the devices does not like to be register-banged too fast.

The sentence was generated by a small program "ChipTalk" I found from this page: http://kth.s3-website-eu-west-1.amazona ... ynt_en.htm
(The main page seems to be having problems, but the amazon cache works...)

Posted: **Sat Mar 02, 2019 11:52 am**

By the way, do you know what's the name of the type of connector used for the 4 wire connection between the cumulus and cumulus board?
I'd like to find a nice looking all black or red cable (maybe braided) instead of the ugly rainbow colored flat cable

Posted: **Sat Mar 02, 2019 1:36 pm**

It's "Molex MiniFitKK 4pin Header Male 2.54mm" or from China "a2542 connector".
Assembled cable - HERE (link is just example).
Unfortunately google image search returns only white or brown connectors.
Keep in mind that female connectors are sold as housing and metal pins separately.
I have 2 such cables but both are real rainbow.

Posted: **Sun Mar 03, 2019 4:00 am**

Dbug wrote: ↑
Sat Feb 02, 2019 8:42 pm
Yes, typo indeed.

That being said, I opened both boxes, and I can confirm that my TechniMusic had a MEA8000 and spoke without a British accent.
I recorded this demo song with it some years ago: http://defence-force.org/download/clair_de_la_lune.mp3

And this Mageco, with French manual and in a French box, does have a SPO inside. Maybe they had an english speaking model early one, and then replaced by a french speaking one later?

Completely off topic but...

Wow, this sounds exactly like I remember the voice in the Mortville Manor to sound.

They did a really good job on that game back then.

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Oric Speech Synthesizer + Cumulus/Microdisk

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Re: Oric Speech Synthesizer + Cumulus/Microdisk

Re: Oric Speech Synthesizer + Cumulus/Microdisk

Re: Oric Speech Synthesizer + Cumulus/Microdisk

Re: Oric Speech Synthesizer + Cumulus/Microdisk

Re: Oric Speech Synthesizer + Cumulus/Microdisk

Re: Oric Speech Synthesizer + Cumulus/Microdisk