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Posted: Sat Mar 11, 2017 11:05 am
by harry66

I've heard someone is working on making a New ORIC ULA on a CPLD...?? Are these available to buy , what CPLD is used and is it true ? :?


Re: ORIC ULA on a CPLD ?

Posted: Sat Mar 11, 2017 4:52 pm
by iss
Take a look HERE and HERE - whole Oric in FPGA.

Re: ORIC ULA on a CPLD ?

Posted: Sat Mar 11, 2017 5:33 pm
by Chema
I'm not aware of any direct replacement. All I am aware of is the work of Mike Brown and
But there was never a final product.

Re: ORIC ULA on a CPLD ?

Posted: Mon Mar 13, 2017 3:49 pm
by harry66
It was just that I was wanting to either make my own ULA (Enhanced) using a CPLD probably EPM7512s or purchase/acquire a CPLD to act as ULA. This would then allow me to design my own homebrew ORIC-1 +

Re: ORIC ULA on a CPLD ?

Posted: Mon Mar 13, 2017 7:31 pm
by Chema
That would be an exciting project! I really think Mike Brown had almost all the functionality analyzed, so it should be a god start.

Let us know about this project if you finally decide to go for it!

Re: ORIC ULA on a CPLD ?

Posted: Thu Mar 16, 2017 1:16 pm
by harry66
I'm still in the Design / feasibility stage of my 'Super' ORIC-1 design... but here's a basic Idea of the specification :


6502 CPU (5MHz Max)
Graphics..CPLD givid Standard + 80x28 TEXT/Graphics, & 480 x200 Graphics possibly even 640x200 bitmapped with second CPLD (EPM7128) producing Tile/Graphics modes overlaid.
Real Time clock with Calendar plus leap-year etc
CF Card interface (to replace Tape)
Two sound Chips AY-3-8910+SN76489
6522VIA+68B50 ACIA for I/O
Possible MCU (89C2051/ATMega328 etc) for PS/2 keyboard
RS232 Ports
I/O Ports for interfacing external hardware.


6502 CPU (running at 1.25MHz,2.5MHz & 5MHz) R65C02P4 or W65C02Pxx
48K SRAM (32K+2x8K) ...HM6264 (2pcs) + HM62256
16K EPROM.... 27C128
6522 VIA
68B50 ACIA
8255 PIO for CF Card
RTC (DS12C887 or similar)
EPM7512 CPLD (holding Enhanced ULA)
EPM7128 used to give a Tile/Grahpics mode (overlay) onto ORIC Modes
AY-3-8910 PSG
SN76489 PSG
5V regulated supply (1.5A)

The EPM7512 will produce/emulate the standard ORIC ULA plus give advanced features like extra graphics modes and switching CPU speed.

All still Pie-In-The-Sky at the moment...but got to start somewhere !!

Re: ORIC ULA on a CPLD ?

Posted: Thu May 18, 2017 12:15 pm
by lezanderson
Putting an ORIC-1/Atmos ULA onto a CPLD ??

I have some Altera MAX CPLDs these may be useful for making your own 'New' & Enhanced ORIC ULA ?? :?:

Alter MAX EPM7128SLC84...128 macrocells : These will probably be too small
Alter MAX EPM7160SLC84-10 160 macrocells : These will probably be too small
Alter Max EPM7256 ( EPM7256SQC208-10) 256 macrocells : These could be adequate
Alter Max EPM7512 ( EPM7512AEQC208,EPM7512AETC144, ) 512 macrocells : These could be ideal

* Note some of these CPLDs are PLCC and some surface mount !!

Just email me at

Best Regards

** You'll need a Atera MAX programming cable .. i.e. USB Blaster cable to program these CPLDs..luckily they are quite cheap !! :) ... Sw5cNYQBI-

Re: ORIC ULA on a CPLD ?

Posted: Mon Jun 05, 2017 11:28 pm
by Godzil
The ULA is a fairly simple system, even if it looks complex, even the smallest CPLD should be enough to fit the complete ULA.

The ULA was made with technologies from the 80s where PLD wasn't there yet and PAL was just at their infancies.

ULA is a similar concept than a PAL/PLD, but instead of using some programmable logic it was made in factory, and can't be modified after being build.

An ULA (which is *not* a Ferranti, in the Orics) is made of prefabricated blocks as in modern CPLD/FPGA where we connect the input and output of theses blocks. I don't have the details of the ULA used in the Oric for how the blocks are made, but you can be sure that there are way less of them than on a modern CPLD, event the smallest one.

The real problem with CPLD is that most of them are 3.3V maximum and the 5V CPLDs start to get really old.

The good news is I've probably found the company who made the ULA, they are defunct, but I'm trying to contact the founder of that company and try to get some information, if not Tangerine design itself, at least internal plans of a bare ULA.

Re: ORIC ULA on a CPLD ?

Posted: Tue Jun 06, 2017 2:17 pm
by Chema
Hey, that is interesting, Godzil. Keep us informed, will you?

And from the works of Mike Brown I am quite sure a modern replacement of the ULA could be built. At least it is documented how it *should* work.

Re: ORIC ULA on a CPLD ?

Posted: Tue Jun 13, 2017 10:37 pm
by Steve M
Tangerine always made a thing about their expertise in ULA design. There was a picture in one article about Oric that showed a £100,000 design computer used to design ULAs. So either they did design it - or they lied a lot.

Allegedly Dr Paul Johnson had a drawing of the ULA on his wall, but he wouldn't release details about it as he didn't know who had the rights to Oric.

That was years ago.

Re: ORIC ULA on a CPLD ?

Posted: Tue Jun 13, 2017 11:01 pm
by Godzil
As far as I can say, in the UK legaly nobody own the name and IP of the Oric as they have expired. I think it is the same in france, and I'm honestly not sure that the french company really own anything apart from just the hardware. (the story about all of that is really fishy) if anyone here have good knowledge about trademark in the UK and europe that would be really welcome.

I'm not saying they have lied about the ULA, but the ULA itself (not the way it is wired) was not designed by tangerine.

If you have contact with Paul, I would be really please to have a copy of that drawing, even if it is with a NDA. My goal is not to show original documents, but to understand the remaining part of the ULA, and how it was build.

I know what the CDI on the chip mean as it is the manufacturer initials: California Device Inc. Found the founder of that company, but can't get to talk with him, if people want to try to, please send me a message I will give you his name.
The rest of the chip ID is still a mystery to me

I would like to get from him, or any person he knows or could point to, internal documentation about the unprogrammed ULA, so present in, in the same way as the guy who do the same on the Ferranti ULA used in the ZX 81 (or spectrum can't remember)

7x or 8x after CDI is probably the chip revision, (or batch), the last 4 numbers are YYWW with YY the two last digit of the year and the next two the week of manufacturing:
8422 will be 1984, Week 22.

What HCS mean and 10017, no idea at all. But HCS could be the name of the component internally at CDI.

(Hum looks like Mike Brown was on the same track as me in 2014) HCS may stand for a type of transistor (HC Series)

In fact I may have found, thanks to him what I was looking for.

(edit: tried to contact Mike Brown to know his advancement on that point if he have more informations that what I've already found)

Re: ORIC ULA on a CPLD ?

Posted: Tue Jun 13, 2017 11:37 pm
by Steve M
Dr Paul could be found online some time ago. I can't find him now. I think Dave Dick interviewed him back around 1998 or so. I guess he could be retired now.

I would try asking Paul Kaufman but he never replied when I asked him something on Facebook. He hasn't posted anything since 2009.

Re: ORIC ULA on a CPLD ?

Posted: Mon Jun 19, 2017 9:01 pm
by Godzil
Is he still alive? :S

Re: ORIC ULA on a CPLD ?

Posted: Tue Jul 03, 2018 10:50 pm
by retroric
iss wrote:
Sat Mar 11, 2017 4:52 pm
Take a look HERE and HERE - whole Oric in FPGA.
Hi guys,

Just stumbled on this thread and I wanted to clarify the status of the "Oric in FPGA" project":

First of all, I am not involved in any way in this project.

However, I created the Github repository for the Oric-in-FPGA project 5 years ago using the "Export to Github" feature of Google Code, as it was the time Google Code was being decommissioned, so I "saved" a few projects I thought were worth saving on my Github account so that important works such as this would not get lost.

It actually says so on the repository's home page ("Automatically exported from") but I thought I'd mention it again so that it is perfecly clear. :)

What I also would like to mention is I am NOT maintaining this project in any way, as I don't have any knowledge of VHDL or FPGA hardware). However, I do encourage you of course to fork this repository if you feel like maintaining it!!