New Member and New Oric Atmos Owner

If you want to ask questions about how the machine works, peculiar details, the differences between models, here it is !
How to program the oric hardware (VIA, FDC, ...) is also welcome.
SpaceFlightOrange
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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Wed Nov 27, 2019 2:11 am

Vyper68 wrote:
Tue Nov 26, 2019 8:40 pm
I have a 16KB EPROM burned with the test ROM if you want to borrow it. Haven’t read all of the thread so just to say have you changed the 12Mhz Crystal?
Haven't changed the crystal, but further up the thread is a capture from my scope showing the clock signal. that said I've not checked this since swapping out the inverter.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Wed Nov 27, 2019 2:45 am

mikeb wrote:
Tue Nov 26, 2019 6:04 pm

TL;DR -- if you ripped out the CPU, VIA, PSG and ROM you'd still get a pattern :)

You've changed the important multiplexer/inverter near the RAM, and the RAM itself. There's not much left to swap, other than the CPU, VIA and PSG, which are all soldered in :(
I guess then I'll wait for the next batch of ram to arrive. I've got a spare 6502a and 6522a. I've received some 40 pin sockets today, but I'll wait until the ram arrives.

mikeb wrote:
Tue Nov 26, 2019 6:04 pm
I use UV-EPROMs for straight plug-in to Oric compatibility needs to be a 27128/27C128 size (16K) -- you can use a 256 or 512, but it's getting into "modding the board" territory rather than repairs (you end up with 2 or 4 possible ROMs in one chip that way, e.g. Oric-1/Atmos/Extended other version/Diagnostics ...
The programmer arrived today (TL866II Plus) I haven't had much chance to play with it due to shifts, but I have managed to get it to read a couple of my Beeb ROMs ok.I've pulled an image off the original Orice 1.1 ROM that came with the machine and an MD5 check matches with the rom that comes with Oricutron, suggesting the rom is ok (a330779c42ad7d0c4ac6ef9e92788ec6).

interestingly, the other ROM I picked up of eBay, that gives the colour lines gives a different hash (60cc14d5b4caed658d66357fcbac144b). They are both labelled 1.1, so I'm not sure what the difference is here.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Wed Nov 27, 2019 2:45 am

iss wrote:
Tue Nov 26, 2019 10:15 pm
Here my diagnostic ROM running on Oric without RAM.
The "busy tone" is bit tiny because no LM386 amplifier - the signal is directly from AY's output pins (not very good idea! :mrgreen: ).

Wow, thats a seriously stripped down board!

I'm going to source a couple of ROMs and burn the diagnostics, and then see what's what. Thanks for this.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Sat Nov 30, 2019 6:16 pm

I've burned both Mike's Diagnostic ROM and ISS's ROM.

I got nothing when running Mikes ROM, but I got this with ISS's ROM:



Sounds right to me, so does that mean the CPU, VIA, and AY are ok?

*** EDIT ***

This is also hooked up to my Bench PSU and I can see that the Atmos is drawing 700 milliamps.

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Re: New Member and New Oric Atmos Owner

Post by mikeb » Sat Nov 30, 2019 6:52 pm

SpaceFlightOrange wrote:
Sat Nov 30, 2019 6:16 pm
I got nothing when running Mikes ROM,
Can't answer for ISS's ROM, but when you say "got nothing", you must have a VERY early failure in the tests that are so bad I couldn't get a message up on screen. See the documentation -- error codes are put onto the address bus.

"A RAM test will be performed and a message put on screen showing if this passes. In the event of a test
failure, the ROM is designed to go into a loop with A15-A8 all logic “1”, A7-A2 will have stable logic
levels indicating a status code (also visible on LEDs if using external board). A1 and A0 will be
cycling rapidly."

What does your scope/probe show is happening on the address bus after boot?

No messing about involved, I go straight to a quick initial test of two page zero locations required for indexing, unlike the one in Oric which seems to assume it will all just work :)

"If the test runs and fails it exits with status code 1 (Quick RAM test fail). As described, the address
lines will be in a stable state (A15-A8 high, A7-A2 will be 000001, A1-A0 pulsing)."

Then a full RAM test is done, failure will be A7-A2 as 000010 ...

I figured, there's no point loading character sets and setting up the screen if I can't even read/write RAM :)

Code: Select all

        ; Cold Reset/Startup comes here
vect_reset:
        SEI                     ; Turn off interrupts
        CLD                     ; Clear decimal mode
        LDX     #$FF            ; Init stack pointer
        TXS                     ; 

        ; Quick RAM test 1 - test that 2 locations in page zero are usable
        ; as a pointer
        ; Writes AA then 55 to each location.

        LDA     #$AA            ; Use 10101010 test pattern 1st time
l00:    STA     $0              ; Write 
        CMP     $0              ; Test
        BNE     l01             ; Mismatch
        STA     $1              ; Write 
        CMP     $1              ; Test
        BNE     l01             ; Mismatch
                                ; Carry is set here from CMP above being equal
        ROL                     ; Changes to 01010101 for 2nd time, carry set
        BCS     l00             ; Then Changes to 10101011 and exits, carry now clr 
        BCC     l02             ; Branch always: Do proper RAM test

l01:    exit    ERR_RAM_QUICK   ; Result - RAM Test 1 failed

        ; Full RAM Test (0x0002-0x02FF,0x0400-0xBFFF skips VIA locs and ROM)
        ; Writes AA then 55 to each location.
If you have DRAM read-write issues, this will definitely die at "ERR_RAM_QUICK" (a JMP loop to itself, placed so that the addresses will cycle as described above).

As iss's ROM "does not need RAM", and works on your board, but mine specifically tests RAM first, and (hopefully) put up the error code on the addressbus, then we're still circling an inability to read and write RAM properly.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Sat Nov 30, 2019 7:26 pm

mikeb wrote:
Sat Nov 30, 2019 6:52 pm

What does your scope/probe show is happening on the address bus after boot?

If you have DRAM read-write issues, this will definitely die at "ERR_RAM_QUICK" (a JMP loop to itself, placed so that the addresses will cycle as described above).
Thanks for the really quick reply. Sorry for not giving any more information than "nothing happens" :oops: I was rather excited that ISS's test was working :lol:

When I turned on I got a lot of noise on the screen, first time was a lot of thin horizontal lines, and the second time it was a pattern similar to the images on here. I did read the docs, and, as you say, assumed it was an early ram failure. I didn’t read the bit about the error being on address bus. Sorry

I didn't hook the scope up but I'll do that shortly and report back.
mikeb wrote:
Sat Nov 30, 2019 6:52 pm
As iss's ROM "does not need RAM", and works on your board, but mine specifically tests RAM first, and (hopefully) put up the error code on the addressbus, then we're still circling an inability to read and write RAM properly.
Fingers crossed. I'm still waiting for my replacement ram to arrive. It seems to have gone AWOL, with no tracking updates.
Last edited by SpaceFlightOrange on Sat Nov 30, 2019 9:57 pm, edited 1 time in total.

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Re: New Member and New Oric Atmos Owner

Post by iss » Sat Nov 30, 2019 8:06 pm

SpaceFlightOrange wrote:
Sat Nov 30, 2019 6:16 pm
Sounds right to me, so does that mean the CPU, VIA, and AY are ok?
This is also hooked up to my Bench PSU and I can see that the Atmos is drawing 700 milliamps.
Yes, this is the correct sound and it means 99.99% CPU,VIA and AY are OK (diag EPROM too, obviously :)).
So the only suspect is the RAM, until it arrives you can try DRAMARDUINO to test your chips. And I think 700 mA is bit higher ...

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Sat Nov 30, 2019 8:58 pm

iss wrote:
Sat Nov 30, 2019 8:06 pm

Yes, this is the correct sound and it means 99.99% CPU,VIA and AY are OK (diag EPROM too, obviously :)).
So the only suspect is the RAM, until it arrives you can try DRAMARDUINO to test your chips. And I think 700 mA is bit higher ...
Wow! that's so cool.

I don't have an Uno, but I do have a Nano, which I think is pretty much the same but scaled down, so I should be able to put this together on a breadboard.

Thanks

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Sat Nov 30, 2019 9:21 pm

Ok, So.

A0 & A1 are like this (Pulsing):
A1.jpg
A1.jpg (133.13 KiB) Viewed 134 times
A2 is like this:
A2.jpg
A2.jpg (118.79 KiB) Viewed 134 times
and A3 is like this:
A3.jpg
A3.jpg (138.21 KiB) Viewed 134 times
A4-A7 are low and A8=A15 are all high.

So it looks like it completed the first test and failed on the full test.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Sun Dec 01, 2019 2:09 am

iss wrote:
Sat Nov 30, 2019 8:06 pm
SpaceFlightOrange wrote:
Sat Nov 30, 2019 6:16 pm
Sounds right to me, so does that mean the CPU, VIA, and AY are ok?
This is also hooked up to my Bench PSU and I can see that the Atmos is drawing 700 milliamps.
Yes, this is the correct sound and it means 99.99% CPU,VIA and AY are OK (diag EPROM too, obviously :)).
So the only suspect is the RAM, until it arrives you can try DRAMARDUINO to test your chips. And I think 700 mA is bit higher ...
Done.
signal-2019-12-01-002440.jpeg
signal-2019-12-01-002440.jpeg (341.48 KiB) Viewed 122 times
I tested all 8 of the original chips and they all failed instantly!! I sure did a right number on those!

I've only tested 2 of the replacements (I had 10) and they both passed. I'll pull the other 8 out tomorrow. Hopefully there'll be a dud among them.

Thanks

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Re: New Member and New Oric Atmos Owner

Post by Dbug » Sun Dec 01, 2019 8:38 am

That's when this happens you are glad you spent the time installing sockets instead of soldering directly the new chips :D

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Re: New Member and New Oric Atmos Owner

Post by mikeb » Sun Dec 01, 2019 9:18 pm

SpaceFlightOrange wrote:
Sat Nov 30, 2019 9:21 pm
A0 & A1 are like this (Pulsing):
(Pulsing)
A2 is like this:
(Low)
and A3 is like this:
(Hi)
A4-A7 are low and A8=A15 are all high.

So it looks like it completed the first test and failed on the full test.
A0/A1 are pulsing because somewhere the CPU is still running round 3 consecutive addresses, and doing

Code: Select all

here; 4C XX XX  JMP here
      EA           NOP
... on memory addresses aligned to do that trick with the address bus for A2-7 ... :)

Your decoded code and conclusion is correct :) Now, the question is :- why?

It seems like the first couple of bytes read ok enough to convince it to carry on. So it could be a weird failure that means that as you progress up memory, it no longer works. E.g. Addresses #0000 and #0001 work, but once you start changing to higher addresses (different row/cols), there's a failure to correctly do the write/read.

I'd say the data bus must be clear (you're reading code from ISS's ROM, and mine, and they are executing correctly, so it's not a chip hogging the bus).

With the DRAMArduino (I'm not familiar with it), make sure you're testing the chip at the right "speed", because if the DRAM chip is slower than needed, it may work when tested slowly, but not when hammered in Oric.

There are three memory accesses per microsecond (CPU, ULA1, ULA2) and slow chips don't work here. 150ns is the official speed, but faster chips should work too (120/100ns)?

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Re: New Member and New Oric Atmos Owner

Post by mikeb » Sun Dec 01, 2019 9:20 pm

Dbug wrote:
Sun Dec 01, 2019 8:38 am
That's when this happens you are glad you spent the time installing sockets instead of soldering directly the new chips :D
100% agree. That goes double when you venture into removing the PSG, VIA and CPU!

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Mon Dec 02, 2019 12:25 am

Sorry for the delayed reply, I’ve been on shift this morning and repairing a Spectrum this afternoon and having considerably more success :lol:
mikeb wrote:
Sun Dec 01, 2019 9:18 pm

With the DRAMArduino (I'm not familiar with it), make sure you're testing the chip at the right "speed", because if the DRAM chip is slower than needed, it may work when tested slowly, but not when hammered in Oric.

There are three memory accesses per microsecond (CPU, ULA1, ULA2) and slow chips don't work here. 150ns is the official speed, but faster chips should work too (120/100ns)?
This has been my thoughts. My fear was that although the Chinese (USA labelled) chips are functioning, they may not be achieving the stated 150ns access I tested them with the DRAMArduino, and they all passed, but as ISS said, it cant 100% guarantee a passing chip will actually run in the machine.

Hopefully some replacements will turn up this week.

Thanks again for all the help. It’s been an education.
Last edited by SpaceFlightOrange on Mon Dec 02, 2019 8:26 am, edited 1 time in total.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange » Mon Dec 02, 2019 12:30 am

mikeb wrote:
Sun Dec 01, 2019 9:20 pm
Dbug wrote:
Sun Dec 01, 2019 8:38 am
That's when this happens you are glad you spent the time installing sockets instead of soldering directly the new chips :D
100% agree. That goes double when you venture into removing the PSG, VIA and CPU!
+1 here. I was fully expecting to go down the road of removing the CPU, VIA and PSG, but hopefully i wont have to now.

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