6502 flags C, N, Z, V and tests

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Symoon
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6502 flags C, N, Z, V and tests

Post by Symoon » Sat May 19, 2018 10:06 am

In my recent works, not being comfortable with assembler, I had to look for many information sites. One thing I never found and thought it was missing, was a summary of the flags that could be set by the user, and tested.
In the end, only the Carry flag can be fully operated and tested with specific instructions.

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Set instruction   Test instruction  Flag
-----------------------------------------
 SEC               BCC              C (carry)
 CLC               BCS
-----------------------------------------
 none              BPL              N (negative)
                   BMI
-----------------------------------------
 none              BEQ              Z (zero)
                   BNE
-----------------------------------------
 CLV               BVC              V (overflow)
                   BVS
-----------------------------------------
 SED               none             D (decimal)
 CLD 

christian
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Re: 6502 flags C, N, Z, V and tests

Post by christian » Sat May 19, 2018 12:40 pm

Sometimes you can also use the BIT instruction:
"BIT sets the Z flag as though the value in the address tested were ANDed with the accumulator. The S and V flags are set to match bits 7 and 6 respectively in the value stored at the tested address."

I have often seen using this instruction to set the V bit to 1 like this:

Code: Select all

...
xxyy 60 RTS
...

SEV:
     2C yy xx BIT xxyy
or

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...
xxyy 40 RTI
...

SEV:
     2C yy xx BIT xxyy

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Re: 6502 flags C, N, Z, V and tests

Post by ThomH » Mon May 21, 2018 4:18 pm

In case it helps to offer any exposition as to `CLV`, 6502s have a dedicated input pin, SO, which when asserted will set overflow. It's there in case the hardware design requires a low-latency polling input:

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          CLV           ; clear V in preparation to wait...
    .loop BVC loop	; repeat until V is set
That gets you to the top of whatever responds to the external hardware in at most 3 cycles, whereas an interrupt takes at least 8 and possibly as many as 15, and having the 6502 constantly poll an address in memory would cost 6 even if you put it on the zero page (and would probably mean more electronics).

That suggests that you need a cheap way to clear the overflow flag, but it doesn't really matter if you've no cheap way to set it.

An example use of this feature is the Commodore 1540 and 1541 disk drives; they have 6502s in them and V is signalled to indicate that the next byte has been assembled from the disk.

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Dbug
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Re: 6502 flags C, N, Z, V and tests

Post by Dbug » Mon May 21, 2018 9:20 pm

Interesting, did not know about this overflow trick :)

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Re: 6502 flags C, N, Z, V and tests

Post by Chema » Mon May 21, 2018 10:20 pm

Same here... Did not know that either.

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Re: 6502 flags C, N, Z, V and tests

Post by NekoNoNiaow » Mon May 21, 2018 10:50 pm

I presume this is already known but for completion sake, CPU status flags can be manipulated indirectly using the PLP instruction:
  • Set A to the desired flag values.
  • Push A on the stack with PHA.
  • Execute PLP, this will set the status flags to the value just stored on the stack.
If speed is not a concern, all status flags can thus be set or reset as desired using PLP.

Also, one could consider the RTI instruction similarly since it also sets the status flags to a value pulled from the stack.

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Re: 6502 flags C, N, Z, V and tests

Post by Symoon » Mon May 21, 2018 11:29 pm

All those other options are very interesting, keep bringing them on ;)
(Initially I made this table was because I needed extremely compact and fast ways to set/test/branch; I counted bytes and cycles many, many times... But having other ways to do is very interesting and can sometimes spare a specific instruction ! ).

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Re: 6502 flags C, N, Z, V and tests

Post by ThomH » Tue May 22, 2018 3:10 pm

Given that `LDA`, `LDX` and `LDY` all set N and Z and all work as immediate instructions, if you have a register you don't mind overwriting then you can set N that way, and if you're setting N=0 then you can also pick a value for Z. It's two cycles, so it costs the same as a `SEC`, etc.

E.g.

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    LDX #$80	; sets N, resets Z
    LDX #$00	; resets N and sets Z
    LDX #$01	; resets N and Z
If you can't afford the register, wrapping a `LDA` in `PHA`/`PLA` allows you to adjust those flags without losing the register contents. Compare and contrast with a more direct `LDA`/`PHA`/`PLP` which lets you be explicit about all the flags in the same number of cycles but overwrites A.

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