I know for a fact that someone did do a VHDL ULA model, I came across it while looking for ULA related material.
It was dated some time after my original 1996 ULA reverse-engineer was published/released, and included signal names in there which were "fictional" ones that I made up to describe signals (most of which are still re-used in the current ACTUAL reverse engineer, as we will probably never know what the signals were really called by Oric's devs).
It also seemed to duplicate some of the mistakes I made, while others had been noticed and corrected, as they would have caused mis-operation of the resulting chip.
The VHDL comments made no mention of being derived from the document I put out, and had copyright notices on it asserting it was someone else's work.
Obviously someone out there has spent a lot of time independently duplicating the work I already did earlier.