VSync ...again!

This is the right place to discuss on how to implement hardware vsync, adding a VIA or AY chipset, puting multiple roms, or how to design a new flash expansion card.
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iss
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VSync ...again!

Post by iss » Wed Nov 23, 2016 11:26 am

Hi all! I want to share here some facts about the VSync, which I think can be useful.

I. The Hardware VSync hack is well known as simple connection between RGB-SYNC output and TAPE-IN input. The output signal represents negative pulses - short for every scanline and long for every frame. Tanks to the TAPE-IN amplifier which acts as low-pass filter all short pulses are filtered and only the long pulses rich VIA's CB1. Important details are that the signal on CB1:
- has a delay of 12 microseconds compared to SYNC (pic.1)
- has the same shape as the SYNC i.e negative pulses (pic.2)
- lasts about 260 microseconds (pic.3) and is equal to the time for 4 scanlines plus the time for one short pulse (i.e 260uS = 4x64 + 4 uSec) - for both modes 50Hz and 60Hz.
That being said, to synchronize drawing with VSync you need to set properly bit 4 in VIA's PCR:
0 = IRQ flag will be set on NEGATIVE edge (or 12 uSec after the vertical retrace start)
1 = IRQ flag will be set on POSITIVE edge (or 12+260 uSec after the vertical retrace start)
Additionally, if you decide to use interrupt (instead polling) you have to enable it in VIA's IER, setting bit 4 to '1'. Practically, there is no big difference which edge will be used - it's 260 uSec, but sometimes this short time can be critical. More important is that keyboard scan or PSG addressing routines can modify PCR too!
1.jpg
2.jpg
3.jpg
Last edited by iss on Wed Nov 23, 2016 4:01 pm, edited 1 time in total.

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iss
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Re: VSync ...again!

Post by iss » Wed Nov 23, 2016 11:27 am

II. The Software VSync using VIA's timer 1.
This topic was already discussed in the forum (here and here), but what puzzles me is:
How the great calibration routine works and why?
First I found that the purpose of the routine is NOT to find the period value which should be set in timer 1,
because this value is always constant for 50Hz = 19966 and for 60Hz = 16894 - tested and proven on real hardware and in Oricutron :).

The goal of the calibration is actualy to find the right moment to start timer 1, so it generates an interrupt synchronously with the vertical retrace start. I modified the routine changing the working mode of the timer 1 (bits 7,6 in ACR set to '11') which forces PB7 output to alternate between '0' and '1' on every timer interrupt. This makes possible to measure exactly the relation between the color bar vertical position and the vertical retrace start.
When the color bar is positioned on the TOP of screen T1 IRQ is generated ~ 2.5 mS after the VSYNC and
When the color bar is positioned on the BOTTOM of screen T1 IRQ is generated ~ 20 - 3.5 = 16.5 mS after the VSYNC.
pos-top-bottom.jpg
So, if you need to know when exactly vertical retrace starts you should take care for above delay values.

In practice more important is how fast is your drawing routine called within the interrupt handler.
For me is very interesting what is the biggest hires sprite which can be drawn flicker free...
Any ideas and comments about VSync are highly appreciated!

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