I am also unsure of its usefulness.
The vsync hardware hack connects the RGB sync output to the cassette input which is CB1 control line of the 6522.
CB1 can be used as the external clock to drive the Shift registers shifting.
So we could use this to frame skip a vsync
The number of frames skipped should be placed into the Shift Register like this..
Code: Select all
11111111 Will trigger an IRQ every Vsync frame
10101010 Will trigger an IRQ every 2 frames
10001000 Will trigger an IRQ every 4 frames
10000000 Will trigger an IRQ every 8 frames
On each vsync, the SR shifts the contents right by 1 bit with Bit0 falling off the end and onto CB2. So we can tell the 6522 beforehand to generate an interrupt on a CB2 transition by setting bit 3 in the IER.
We'll also need to handle when the shift register has shifted all 8 bits so we should also enable the Shift Register Interrupt bit 2 in the IER.
And in the IRQ we'll need to detect both sources, so we just read the IFR and detect bits 2 and 3.
On a bit 2 event we reload the shift register (this will also clear the IRQ) and on a Bit 3 event we should read PortB (to clear IRQ flag) and take this event as the indicator that the frame has been reached to do stuff.
Now obviously all this will upset the AY since CA2 and CB2 is used to control data sent to the Sound Chip through Port A.
So i would suggest we set CA2 permanently high since 01 is read and 11 is Register.
As i say this is completely theoretical but if people can think that it could be very useful then i'll do some proof of concept code